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Commit aee6a6f4 authored by Christoph Cullmann's avatar Christoph Cullmann 🐮
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push new verilog hl 

too long been only in bugzilla
BUG: 121949
parent dbbf77d5
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part/syntax/data/verilog.xml
View file @ aee6a6f4
<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE language SYSTEM "language.dtd">
<language name="Verilog" version="1.08" kateversion="2.4" section="Hardware" extensions="*.v;*.V;*.vl" mimetype="text/x-verilog-src" author="Yevgen Voronenko (ysv22@drexel.edu)" license="">
<language name="Verilog" version="1.09" kateversion="2.4" section="Hardware" extensions="*.v;*.V;*.vl" mimetype="text/x-verilog-src" author="Yevgen Voronenko (ysv22@drexel.edu), Ryan Dalzell (ryan@tullyroan.com)" license="">
<highlighting>
<list name="keywords">
<item> macromodule </item>
<item> task </item>
<item> endtask </item>
<item> function </item>
<item> endfunction </item>
<item> table </item>
<item> endtable </item>
<item> specify </item>
<item> specparam </item>
<item> endspecify </item>
<item> case </item>
<item> casex </item>
<item> casez </item>
<item> endcase </item>
<item> fork </item>
<item> join </item>
<item> defparam </item>
<item> default </item>
......@@ -42,6 +32,38 @@
<item> edge </item>
<item> posedge </item>
<item> negedge </item>
<!-- verilog-2001 keywords -->
<item> config </item>
<item> endconfig </item>
<item> library </item>
<item> design </item>
<item> liblist </item>
<item> cell </item>
<item> use </item>
<item> instance </item>
</list>
<list name="beginwords">
<item> begin </item>
<item> fork </item>
<item> module </item>
<item> case </item>
<item> casex </item>
<item> casez </item>
<item> task </item>
<item> function </item>
<item> generate </item>
</list>
<list name="endwords">
<item> end </item>
<item> join </item>
<item> endmodule </item>
<item> endcase </item>
<item> endtask </item>
<item> endfunction </item>
<item> endgenerate </item>
</list>
<list name="strength">
......@@ -118,36 +140,26 @@
<!-- other -->
<item> parameter </item>
<item> event </item>
</list>
<list name="begin">
<item>begin</item>
</list>
<list name="end">
<item>end</item>
</list>
<list name="module">
<item>module</item>
</list>
<list name="endmodule">
<item>endmodule</item>
<!-- verilog-2001 types -->
<item> signed </item>
<item> automatic </item>
<item> genvar </item>
<item> localparam </item>
</list>
<contexts>
<context attribute="Normal Text" lineEndContext="#stay" name="Normal">
<RegExpr attribute="Keyword" context="Block name" String="begin\ *:" beginRegion="beginend"/>
<keyword attribute="Keyword" context="#stay" String="begin" beginRegion="beginend"/>
<keyword attribute="Keyword" context="#stay" String="end" endRegion="beginend"/>
<keyword attribute="Keyword" context="#stay" String="module" beginRegion="moduleEndmodule"/>
<keyword attribute="Keyword" context="#stay" String="endmodule" endRegion="moduleEndmodule"/>
<DetectSpaces />
<RegExpr attribute="Keyword" context="Block name" String="begin\ *:" beginRegion="Block"/>
<RegExpr attribute="Keyword" context="Block name" String="fork\ *:" beginRegion="Block"/>
<keyword attribute="Keyword" String="beginwords" context="#stay" beginRegion="Block"/>
<keyword attribute="Keyword" String="endwords" context="#stay" endRegion="Block"/>
<keyword attribute="Keyword" context="#stay" String="keywords" />
<keyword attribute="Data Type" context="#stay" String="types" />
<keyword attribute="Drive/charge strength" context="#stay" String="strength" />
<keyword attribute="Gate instantiation" context="#stay" String="gates" />
<RegExpr attribute="Normal Text" context="#stay" String="[a-zA-Z]+[\w$]*"/>
<RegExpr attribute="Normal Text" context="#stay" String="\\[^ ]+ "/>
<RegExpr attribute="Decimal" context="#stay" String="[\d_]*'d[\d_]+"/>
<RegExpr attribute="Octal" context="#stay" String="[\d_]*'o[0-7xXzZ_]+"/>
<RegExpr attribute="Hex" context="#stay" String="[\d_]*'h[\da-fA-FxXzZ_]+"/>
......@@ -155,19 +167,19 @@
<Float attribute="Float" context="#stay"/>
<Int attribute="Integer" context="#stay" />
<RegExpr attribute="Port connection" context="#stay" String="[^\w$]\.[a-zA-Z]+[\w$]*"/>
<RegExpr attribute="Case label" context="#stay" String="[a-zA-Z0-9_, \t]+\s*:" firstNonSpace="true"/>
<!--<RegExpr attribute="Port map" context="Port" String="\.[a-zA-Z0-9_]+"/>-->
<DetectChar attribute="String" context="String" char="&quot;"/>
<Detect2Chars attribute="Comment" context="Commentar 1" char="/" char1="/"/>
<Detect2Chars attribute="Comment" context="Commentar 2" char="/" char1="*" beginRegion="comment"/>
<Detect2Chars attribute="Comment" context="Commentar 2" char="/" char1="*" beginRegion="Comment"/>
<AnyChar attribute="Symbol" context="#stay" String="!%&amp;()+,-&lt;=+/:;&gt;?[]^{|}~@"/>
<StringDetect attribute="Comment" context="Some Context2" String="#if 0" insensitive="FALSE" firstNonSpace="true"/>
<DetectChar attribute="Preprocessor" context="Preprocessor" char="`" column="0"/>
<RegExpr attribute="Preprocessor" context="#stay" String="\`[a-zA-Z_]+\w*" />
<RegExpr attribute="System Task" context="#stay" String="\$[a-zA-Z_]+\w*" />
<RegExpr attribute="Delay" context="#stay" String="#[\d_]+" />
</context>
<context attribute="String" lineEndContext="#pop" name="String">
<LineContinue attribute="String" context="Some Context"/>
......@@ -175,11 +187,11 @@
<DetectChar attribute="String" context="#pop" char="&quot;"/>
</context>
<context attribute="Comment" lineEndContext="#pop" name="Commentar 1">
<RegExpr attribute="Alert" context="#stay" String="(FIXME|TODO)" />
<IncludeRules context="##Alerts" />
</context>
<context attribute="Comment" lineEndContext="#stay" name="Commentar 2">
<RegExpr attribute="Alert" context="#stay" String="(FIXME|TODO)" />
<Detect2Chars attribute="Comment" context="#pop" char="*" char1="/" endRegion="comment"/>
<IncludeRules context="##Alerts" />
<Detect2Chars attribute="Comment" context="#pop" char="*" char1="/" endRegion="Comment"/>
</context>
<context attribute="Preprocessor" lineEndContext="#pop" name="Preprocessor">
<LineContinue attribute="Preprocessor" context="Some Context"/>
......@@ -193,12 +205,16 @@
</context>
<context attribute="Normal Text" lineEndContext="#pop" name="Some Context"/>
<context attribute="Comment" lineEndContext="#stay" name="Some Context2">
<RegExpr attribute="Alert" context="#stay" String="(FIXME|TODO)" />
<IncludeRules context="##Alerts" />
<StringDetect attribute="Comment" context="#pop" String="#endif" firstNonSpace="true"/>
</context>
<context attribute="Block name" lineEndContext="#pop" name="Block name">
<RegExpr attribute="Data Type" context="#pop" String="[^ ]+"/>
<DetectIdentifier attribute="Data Type" context="#pop"/>
</context>
<context attribute="Normal Text" lineEndContext="#stay" name="Port">
<DetectIdentifier attribute="Normal Text" context="#pop"/>
</context>
</contexts>
......@@ -227,13 +243,14 @@
<itemData name="Block name" defStyleNum="dsDataType"/>
<itemData name="Drive/charge strength" defStyleNum="dsBaseN"/>
<itemData name="Gate instantiation" defStyleNum="dsDataType"/>
<itemData name="Port connection" defStyleNum="dsDataType"/>
</itemDatas>
<itemData name="Port map" defStyleNum="dsDataType"/>
<itemData name="Case label" defStyleNum="dsDecVal"/>
</itemDatas>
</highlighting>
<general>
<comments>
<comment name="singleLine" start="//" />
<comment name="multiLine" start="/*" end="*/" />
<comment name="multiLine" start="/*" end="*/" region="Comment"/>
</comments>
<keywords casesensitive="1" />
</general>
......
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