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VHDL: fix some highlighting and folding errors

jonathan poelen requested to merge jpoelen/syntax-highlighting:vhdl into master
  • fix name match of some endRegion
  • fix some inversion between Control, Keyword and Redirection styles
  • fix highlighting of the name on when name
  • fix if in if/for ... generate
  • add elsif/else with if ... generate
  • add folding on generic/port maps
  • add style in type definition

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